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Intel Unveils 256-Core Xeon 7 at Hot Chips, Delays Launch to 2027

Diamond Rapids brings 256 cores, PCIe Gen6 and drops hyperthreading, but Intel pushes launch back as it targets HPC and agentic AI workloads.

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Intel detailed its next-generation Xeon 7 server processor at Hot Chips 2026 this week, revealing a 256-core design that drops hyperthreading entirely and targets high-performance computing and agentic AI workloads. The chip, codenamed Diamond Rapids, represents Intel most aggressive server architecture in years, built on the enhanced Intel 18A-P process node with advanced chiplet packaging. However, the launch has slipped from its originally planned 2026 window to 2027, giving competitors more time to solidify their positions.

Diamond Rapids scales to 256 physical cores organized across 22 chiplets: 16 core-compute dies on Intel 18A-P, four Intel-3-T CBB base dies and two Intel-3 fabric hubs. The design uses Foveros Direct 3D stacking and UCIe-S interconnects to bind modular compute tiles into a unified system. Intel said the architecture delivers 1.28 gigabytes of last-level cache, a substantial increase over the current Xeon 6 generation. The elimination of simultaneous multithreading, which Intel dropped from all Diamond Rapids SKUs, reflects a deliberate bet that raw physical cores will outperform logical threading for AI and scientific workloads.

The platform packs significant I/O upgrades aimed at AI accelerator attachment and memory expansion. Diamond Rapids integrates 128 lanes of PCIe Gen6 and Compute Express Link 3.0, enabling high-bandwidth connections to GPUs, AI accelerators and disaggregated memory pools. Memory bandwidth sees a major leap with 16 DDR5 channels supporting data rates up to 12,800 megatransfers per second with multi-rank DIMMs, delivering the throughput needed for large model training and inference. The chip also adds updated Advanced Matrix Extensions with FP8 support and full AVX 10.2 vector instructions, both relevant to AI compute.

The architecture is positioned to compete directly with AMD sixth-generation Venice Epyc processors, which are also expected to top out at 256 cores. However, Intel has focused Diamond Rapids on the high-end HPC segment, offering only the AP-class variants with full core counts. There will be no eight-channel memory parts for mainstream server workloads, a departure from Intel traditional approach of spanning the full market spectrum. The company said the design decision reflects the growing importance of agentic AI workloads that require heterogeneous compute pairing general-purpose processing with dedicated acceleration.

Intel also presented two complementary platforms at the conference. Crescent Island, a data center GPU with 480 gigabytes of LPDDR5X memory, targets high-density inference workloads. Wildcat Lake, branded as Intel Core Series 3, is a client and edge SoC integrating two performance cores, four efficiency cores, an Xe3 GPU with XMX acceleration, and a neural processing unit rated at 17 TOPS. Both platforms use Intel Foundry 18A process technology and Foveros packaging, forming what the company describes as a full-stack approach to enterprise AI across data center, inference and edge tiers.

The delay to 2027 means Diamond Rapids will arrive later than originally planned, giving AMD time to launch its Venice Epyc lineup and potentially capture share in the HPC segment. AMD has been steadily gaining ground in the server market, with its EPYC processors now commanding a significant portion of new data center deployments. Intel foundry process yields and packaging complexity have been cited as factors in the schedule slip, though Intel has not provided detailed explanations. The company is counting on the 18A-P node improvements to deliver competitive performance-per-watt once the chips ship.

The Hot Chips presentations signal Intel strategy of targeting AI workloads through a combination of high core counts, advanced packaging and purpose-built accelerators. Diamond Rapids lacks the integrated AI acceleration found in Nvidia Grace or AMD MI-series chips, instead relying on PCIe Gen6 connectivity to attach external accelerators. This approach gives system builders flexibility to pair the CPU with the accelerator of their choice, but requires Intel to compete on raw CPU performance and memory bandwidth against increasingly capable ARM-based alternatives.

Analysts said the 256-core count and 128 PCIe Gen6 lanes position Diamond Rapids well for the agentic AI era, where workloads increasingly mix general reasoning with specialized inference. The drop of hyperthreading, while controversial, aligns with HPC trends where physical core count drives throughput more reliably than logical threading. Intel will need strong yields and competitive pricing to win back share when Diamond Rapids finally ships in 2027, against both AMD Venice and the growing wave of ARM-based server chips from Ampere, Graviton and Nvidia Grace.

SourcesTom Hardware; The Register; StorageReview; Intel newsroom
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Founder and editor of Pulse of Nations, an independent wire service covering war, geopolitics, markets and technology.

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