Micron is preparing to roughly double its high-bandwidth memory capacity to about 100,000 wafers per month by the end of 2026, according to a report by South Korea’s Electronic Times citing industry sources. The expansion would add up to 60,000 wafer starts and narrow, though not close, the gap with Samsung Electronics and SK Hynix, which industry estimates put at 150,000 to 200,000 wafers a month each.
The 100,000 figure has not been confirmed by Micron as an official target. What the company has confirmed is the demand behind it: HBM4 revenue has already passed $1 billion in cumulative shipments, and CEO Sanjay Mehrotra told investors in June that the 12-layer HBM4 ramp is running about twice as fast as the HBM3E ramp did.
Equipment suppliers have reportedly received larger orders to support the build-out. Taiwan and Singapore are named as the central manufacturing and packaging locations, with investment preparation underway in Hiroshima, Japan.
HBM4 for Vera Rubin
The product driving the expansion is 12-high HBM4, built for Nvidia’s Vera Rubin AI accelerator platform. Micron began mass production of 12-layer HBM4 in the second quarter, with per-pin bandwidth above 11 Gbit/s and more than 2.8 TB/s of total bandwidth, about 20% more energy efficient than HBM3E.
According to ETNews estimates, HBM4 accounted for 20% to 30% of Micron’s HBM output early this year and could reach 50% by year-end. The shift matters for capacity math: HBM requires far more wafer area per bit than standard DRAM, plus complex stacking and advanced packaging, so 100,000 HBM wafer starts yield much less sellable memory than the same count of DDR5 wafers.
| Item | Status |
|---|---|
| HBM capacity in 2025 | about 40,000-50,000 wafers/month (reported) |
| Target by end-2026 | about 100,000 wafers/month (reported) |
| Additional capacity | up to 60,000 wafers/month |
| Key locations | Taiwan, Singapore, Hiroshima in prep |
| HBM4 share of output | 20-30% early 2026, up to 50% by year-end |
| Rivals’ capacity | 150,000-200,000 wafers/month each (Samsung, SK Hynix) |
A memory market running hot
The expansion fits a broader scramble for AI memory across the industry. Sandisk this week pitched its NAND-based high bandwidth flash as a read-optimized tier that can match HBM bandwidth with eight to 16 times the capacity at similar cost, positioning it alongside rather than instead of HBM for inference workloads. Longer context windows and larger KV caches keep pulling flash closer to compute, and Sandisk argued the two memory types will sit side by side in future AI architectures rather than compete head to head.
The demand side shows no sign of cooling. Micron has warned publicly that the memory crunch will outlast 2026 as AI demand outpaces what HBM, DRAM and NAND can supply. Hyperscalers keep locking in multi-year supply, and every new accelerator generation raises the memory-per-chip requirement. Nvidia’s Vera Rubin platform is the immediate anchor for HBM4, but AMD and custom ASIC programs are queuing behind it.
For Micron, the constraint is not just wafer count. Yield, packaging yield, qualification at Nvidia and other customers, and the pace of the transition to HBM4E will all determine how much saleable memory the new equipment actually produces. Advanced packaging capacity, much of it concentrated in Taiwan, is a shared bottleneck across the industry and a place where a stumble would delay revenue even if wafer starts arrive on schedule.
Third place, for now
Micron’s position in the HBM trio has always been third. Even at 100,000 wafers a month it would remain behind both Korean rivals in raw scale, but the shortfall would shrink considerably, and its early HBM4 lead with Nvidia gives it a product edge that capacity numbers alone do not capture. Being first to volume on the memory Nvidia’s flagship platform requires is worth more than being largest on last year’s part.
The reported target, if it holds, would mark the fastest capacity doubling in the company’s HBM program to date. The caveat repeats: the number comes from industry sources, not Micron’s own guidance, and the company has been careful in past quarters to confirm revenue milestones while staying quiet on forward capacity. Investors will get a clearer read at the next earnings call, when management typically updates wafer starts and HBM mix directly.
What is already certain is the direction. Micron is installing tools in two countries, preparing a third, and has told the market its fastest ramp ever is underway. The only open question is whether 100,000 turns out to be the ceiling or a waypoint.
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